1. Field of the Invention
The present invention is related to data processing systems and more specifically to a method and apparatus for increasing bandwidth on a computer bus that interfaces with a bus that has data bursting capabilities.
2. Prior Art
A prior art Peripheral Component Interface (PCI) bus protocol provides for burst reads and burst writes to attached devices such as a graphics subsystems, local area network and disk drives. However, Central Processor Units (CPU's) such as the Intel i486.TM. CPU can only burst reads from a peripheral bus, not writes to a peripheral bus. If a write were to take place with a prior art system over the PCI interface, such as to a frame buffer memory of a graphics display, then it would be necessary to transfer just one data word (DWORD) at a time. This incurs a high overhead, perhaps 6 clock cycles or more of the PCI bus, even if the target device responds with zero wait states.
It is therefore an object of this invention to provide a method and means for transferring sequential non-burst data on a first bus to burst data on a second bus.